diff --git "a/C:\\Users\\pdaho\\AppData\\Local\\Temp\\TortoiseGit\\rb_mjit_header-1c701ba.001.h" "b/C:\\moje\\prace\\branches\\arepo\\rb_mjit_header.h" index cf32b82..5268988 100644 --- "a/C:\\Users\\pdaho\\AppData\\Local\\Temp\\TortoiseGit\\rb_mjit_header-1c701ba.001.h" +++ "b/C:\\moje\\prace\\branches\\arepo\\rb_mjit_header.h" @@ -315,14 +315,21 @@ #define __ATOMIC_HLE_ACQUIRE 65536 #define __ATOMIC_HLE_RELEASE 131072 #define __GCC_ASM_FLAG_OUTPUTS__ 1 -#define __nocona 1 -#define __nocona__ 1 -#define __tune_core2__ 1 +#define __amdfam10 1 +#define __amdfam10__ 1 +#define __tune_amdfam10__ 1 #define __code_model_medium__ 1 #define __MMX__ 1 +#define __3dNOW__ 1 +#define __3dNOW_A__ 1 #define __SSE__ 1 #define __SSE2__ 1 #define __SSE3__ 1 +#define __SSE4A__ 1 +#define __ABM__ 1 +#define __LZCNT__ 1 +#define __POPCNT__ 1 +#define __PRFCHW__ 1 #define __FXSR__ 1 #define __SSE_MATH__ 1 #define __SSE2_MATH__ 1 @@ -9304,9 +9311,6 @@ _mm_abs_pi32 (__m64 __X) #undef __DISABLE_SSSE3__ #pragma GCC pop_options #define _AMMINTRIN_H_INCLUDED -#pragma GCC push_options -#pragma GCC target("sse4a") -#define __DISABLE_SSE4A__ extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_stream_sd (double * __P, __m128d __Y) { @@ -9337,8 +9341,6 @@ _mm_inserti_si64(__m128i __X, __m128i __Y, unsigned const int __I, unsigned cons { return (__m128i) __builtin_ia32_insertqi ((__v2di)__X, (__v2di)__Y, __I, __L); } -#undef __DISABLE_SSE4A__ -#pragma GCC pop_options #define _SMMINTRIN_H_INCLUDED #pragma GCC push_options #pragma GCC target("sse4.1") @@ -9775,9 +9777,6 @@ _mm_cmpgt_epi64 (__m128i __X, __m128i __Y) #undef __DISABLE_SSE4_1__ #pragma GCC pop_options #define _POPCNTINTRIN_H_INCLUDED -#pragma GCC push_options -#pragma GCC target("popcnt") -#define __DISABLE_POPCNT__ extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_popcnt_u32 (unsigned int __X) { @@ -9788,8 +9787,6 @@ _mm_popcnt_u64 (unsigned long long __X) { return __builtin_popcountll (__X); } -#undef __DISABLE_POPCNT__ -#pragma GCC pop_options #pragma GCC push_options #pragma GCC target("sse4.1") #define __DISABLE_SSE4_1__ @@ -48385,9 +48382,6 @@ _mm_sha256rnds2_epu32 (__m128i __A, __m128i __B, __m128i __C) #undef __DISABLE_SHA__ #pragma GCC pop_options #define _LZCNTINTRIN_H_INCLUDED -#pragma GCC push_options -#pragma GCC target("lzcnt") -#define __DISABLE_LZCNT__ extern __inline unsigned short __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __lzcnt16 (unsigned short __X) { @@ -48413,8 +48407,6 @@ _lzcnt_u64 (unsigned long long __X) { return __builtin_ia32_lzcnt_u64 (__X); } -#undef __DISABLE_LZCNT__ -#pragma GCC pop_options #define _BMIINTRIN_H_INCLUDED #pragma GCC push_options #pragma GCC target("bmi") @@ -49485,9 +49477,6 @@ _m_prefetchw (void *__P) { __builtin_prefetch (__P, 1, 3 ); } -#pragma GCC push_options -#pragma GCC target("sse,3dnow") -#define __DISABLE_3dNOW__ extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _m_femms (void) { @@ -49605,11 +49594,6 @@ _m_to_float (__m64 __A) __tmp.v = (__v2sf)__A; return __tmp.a[0]; } -#undef __DISABLE_3dNOW__ -#pragma GCC pop_options -#pragma GCC push_options -#pragma GCC target("sse,3dnowa") -#define __DISABLE_3dNOW_A__ extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _m_pf2iw (__m64 __A) { @@ -49635,8 +49619,6 @@ _m_pswapd (__m64 __A) { return (__m64)__builtin_ia32_pswapdsf ((__v2sf)__A); } -#undef __DISABLE_3dNOW_A__ -#pragma GCC pop_options #define _FMA4INTRIN_H_INCLUDED #pragma GCC push_options #pragma GCC target("fma4")